1. Technical Field
The present invention relates to an apparatus and method for duty cycle correction.
2. Discussion of the Related Art
A duty cycle is a ratio between time when a signal is transmitted and time when the signal is not transmitted during one period in a wire/wireless communication or circuit system. A clock signal having a duty cycle of 50% is required in a general system. That is, the duty cycle of a clock signal is necessarily constant so as to ensure a normal operation of the system. The signal having a duty cycle that is not 50% refers to a signal in which the ratio occupied by a high or low section from the entire clock signal is greater or less than 0.5.
An apparatus for duty cycle correction is required to allow the duty cycle of a clock signal to be maintained constant. To this end, a conventional apparatus for duty cycle correction corrects a distorted duty cycle of a signal using the signal having the distorted duty cycle and an external signal. However, the conventional apparatus for duty cycle correction is necessarily provided with a complicated control circuit that receives a signal inputted from the outside thereof and calculates the delay time of a distorted signal. Therefore, the control circuit is complicated, and current consumption is also increased.